Last week, OnChip released the RISC-V Open-V in real, tangible silicon. Choice is always a good thing, and now SiFive, a fabless semiconductor company, has released the HiFive1 as a crowdfunding ...

A band of heavy rain will sweep eastwards this morning. Before midday, it will clear to bright spells and scattered showers. Some will be heavy and with a local risk of thunder. A breezy day ...

Powered by the Eswin EIC7700X SoC with a quad-core SiFive P550 CPU, it provides a robust platform for developing and optimizing RISC-V operating systems and applications across diverse markets. It ...

This is the general hardware-specific BSP layer for the SiFive boards. But changes are also validated on Qemu RISC-V 64bits, so this layer also provide a Kas yaml to build this machine. Building disk ...

SiFive brings the power of the open source RISC-V ISA combined with innovations in CPU IP to the semiconductor industry, making it possible to develop domain-specific silicon faster than ever before.

Founded by the inventors of RISC-V, SiFive IP addresses the need to combat the rapidly increasing cost of designing and manufacturing new chip architectures, and fulfills the company’s mission of ...