As part of the collaboration between the two companies, Silterra licensed HPL's TechXpress IP, which was customized to Silterra's design rules and proprietary bitcells. HPL's Dallas-based test lab ...
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the clock reference by an integer between 1 and 4. It ...
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