Recently, on the financial industry interactive platform, Yuncong Technology disclosed its latest progress in the RISC-V chip architecture field, particularly regarding its strategic investment with ...
A new technical paper titled “Automatically Retargeting Hardware and Code Generation for RISC-V Custom Instructions” was ...
RISC-V is the open industry standard Instruction Set Architecture (ISA), bringing new possibilities for innovation to automotive. An ISA is the interface between hardware and software, and the open ...
IT Home reported on September 12 that Infineon, a leading company in automotive semiconductors, announced at the OktoberTech ...
SiFive’s Intelligence Gen 2 RISC-V IP portfolio combines scalar, vector, and matrix compute to accelerate AI workloads.
MIPS, a GlobalFoundries company, announced today that Alan Li has joined as head of Business Development for China. In this role, Alan will lead business expansion across the region, building on his ...
This week at the AI Infra Summit, the RISC-V chip designer revealed its second generation of Intelligence cores, including ...
According to SiFive, its engineers enhanced the two designs with a new co-processor interface. The technology will make it ...
The researchers "conclude that at least 40% of the x86 ISA, even after excluding multimedia extensions, could be emulated ...
Breakthrough RISC-V based SoC generator platform marks leap in chip design automation keeping our semiconductor journey with the latest tools in the world.
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