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imec has presented a tungsten (W) buried power rail (BPR) integration scheme in a FinFET CMOS test vehicle, which does not impact the CMOS device characteristics. Using this week's 2020 Symposia on ...
Imec has shown a tungsten (W) buried power rail (BPR) integration scheme in a FinFET CMOS test vehicle, which does not adversely impact the CMOS device characteristics. When interfacing the BPR with ...
We introduce a fabless approach to embed active nanophotonics in bulk CMOS by co-designing the back-end-of-line metal layers for optical functionality. Without changing any of the design rules imposed ...
The top CMOS device process was carried out at 500°C in a FEOL 300mm fabrication above state-of-the art CU/ULK 28nm BEOL. "This achievement establishes the feasibility of manufacturing ...
A look at array performance and key parameters to meet standard CMOS BEOL requirements. July 20th, 2017 - By: GlobalFoundries Perpendicular Spin-Transfer Torque (STT) MRAM is a promising technology in ...