Ferguson: This is a big part of what’s driving consolidation within the EDA industry. You see Siemens and Mentor and Altair ...

Currently, it can take between 18 months to two years to design a chip, and as compute requirements increase, it’s a process that is becoming increasingly costly and time-consuming.

DRAM memory encryption: If sensitive data is stored in external DRAM, an inline memory encryption engine (IME) in the memory controller is recommended. Modern SoCs use IMEs to encrypt data going to ...

“The biggest change is the methodology of when we design these things. Usually, it’s a balance, because you don’t want to over-design them. But now, instead of having a 1 MB part for that, now we need ...