This paper presents a wideband input buffer for a 4 GS/s 14-b time-interleaved (TI) analog-to-digital converter (ADC). This buffer utilizes pseudo-differential push-pull architecture with adaptive ...

Abstract: This paper presents a low-power 12-bit 100-MS/s asynchronous successive approximation register analog-to-digital converter (SAR ADC). Several techniques are developed to enhance the ADC ...