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IEEE4d
A 24- $\mu \text{W}$ 12-bit 1-MS/s SAR ADC With Two-Step Decision DAC Switching in 110-nm CMOS
Abstract: This paper presents an energy-efficient 12-bit successive approximation (SA) register analog-to-digital converter (ADC) for high-performance sensor systems. The ADC uses a two-step decision ...
IEEE4d
A 0.9-V 12-bit 100-MS/s 14.6-fJ/Conversion-Step SAR ADC in 40-nm CMOS
Abstract: This paper presents a low-power 12-bit 100-MS/s asynchronous successive approximation ... resulting in a figure of merit of 14.6 fJ/conversion-step. The ADC core occupies an active area of ...