This position is an opportunity to be part of a dynamic team with ample opportunity to contribute, learn, innovate and grow.

As designs become more complex, standard co-verification techniques are running out of steam. At the same time, many complex SOC (system-on-chip) designs are still using nothing more than a ...

It is increasingly unacceptable, in terms of both time and money, to change the architecture mid-way, and equally unacceptable to “over-engineer” from a unit cost perspective. These first two facets ...

Obviously, this design needs to fulfil constraints on “time to market†, security of design data, and the customer-specific final product functionality. This IP design is being performed in a truly ...

A design engineer’s project time for doing design has reduced by 15 percent from 2007-2014, while the engineer’s time for doing verification had seen 17 percent increase during the same time. At this ...

Automating the HSI design process across the entire dev team. The hardware-software interface (HSI) holds an important role in chip design, bridging the physical hardware and its software counterpart.

The SoC designer and the layout engineer must work together with awareness that different constraints govern each IP block. Applying time-honored design placement and routing rules avoids ...

Srikanth Aitha is a seasoned Senior Staff Physical Design Engineer with over 13 years of expertise in advanced SoC design and ...

Today, Socionext announces the release of a new white paper titled "Optimizing High-Bandwidth Switch Fabric SoC Design: Minimizing Implementation Risks, Ensuring First-Pass Success, and ...

An in-house NoC to support multiple SoC projects requires configurability and flexibility in multiple dimensions. As a result, developing a NoC from the ground up can be as complicated and ...